1. Technical Field
The present invention relates to an inspection system that inspects the edge normal surface of a semiconductor wafer or like substrate such as a microelectronics substrate to identify defects therealong.
2. Background Information
Over the past several decades, the semiconductor has exponentially grown in use and popularity. The semiconductor has in effect revolutionized society by introducing computers, electronic advances, and generally revolutionizing many previously difficult, expensive and/or time consuming mechanical processes into simplistic and quick electronic processes. This boom in semiconductors has been fueled by an insatiable desire by business and individuals for computers and electronics. Therefore, there is a need for faster, more advanced computers and electronics. To satisfy this need, quality and efficiency is required, whether it be on an assembly line, on test equipment in a lab, on the personal computer at one's desk, or in home electronics and toys.
Manufacturers of semiconductors have made vast improvements in end product quality, speed and performance as well as in manufacturing process quality, speed and performance. However, there continues to be demand for faster, more reliable and higher performing semiconductors. To assist these demands, better inspection is necessary to increase yields. One area that has been generally ignored is the edge of the semiconductor wafer. It is believed that inspection of such edge area will lead to better information on defects, thereby enabling improved process control and improved wafer yields.
In the past when attempts to inspect the edge of a semiconductor wafer were made, it was generally performed manually with the naked eye of a human operator. As with all human inspection, repeatability, training, and capture rate are subject to flux. It has recently been discovered that edge inspection is important for detecting delamination of thin films, chipping and cracking of the wafer, resist removal metrology, and particle detection that all cause yield issues in a modern fab. Furthermore, the edge of the wafer is a leading indicator of process status, and by monitoring the edge of the wafer for changes in appearance, tighter process control can be implemented.
One proposed solution looks directly at the edge normal of the wafer. This solution provides limited benefits in detecting particles and chip-outs, and is limited in classifying defects. There is a need for continued improvement in edge inspection, in particular, for unique, robust methods, processes, and algorithms to accomplish an edge normal inspection.